# SpinalHDL/VexRiscv — RepoVerse

A FPGA friendly 32 bit RISC-V CPU implementation

URL: https://repoverse.app/cards/84366787

[Repository source](https://github.com/SpinalHDL/VexRiscv)

## Card snapshot

- Edition: Genesis
- Rarity: common
- Finish: Base
- Attack: 3225
- Defense: 4678
- GitHub stars: 3296
- GitHub forks: 519
- Language: Assembly
- Category: Open Source Classics
- Snapshot date: 2026-10-22

These repository statistics and game attributes belong to this dated card snapshot. They are not a current assessment of software quality.

This page describes the repository card, without a holder or individual copy record.

- [Rules](https://repoverse.app/rules.md)
- [Explore](https://repoverse.app/explore)